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1 of 14 080602 features temperature measurements require no external components measures temperatures from ?55 c to +125 c. fahrenheit equivalent is ?67 f to 257 f thermometer accuracy is 2.0 c thermometer resolution is configurable from 9 to 12 bits (0.5 c to 0.0625 c resolution) thermostat settings are user definable data is read from/written to via a 2?wire serial interface wide power supply range (2.7v ? 5.5v) software compatible with ds75 2?wire thermal watchdog in thermometer mode space?conscious sot23?5 package with low thermal time constant pin assignment pin description gnd ground scl 2?wire serial clock sda 2?wire serial data input/output v dd power supply voltage o.s. thermostat output signal description the ds1775 sot23-5 digital thermometer and ther mostat provides temperature readings which indicate the temperature of the device. thermostat settings and temperature readings are all communicated to/from the ds1775 over a simple 2?wire serial interfac e. no additional components are required; the device is truly a ?t emperature?to?digital? converter. for applications that require great er temperature resolution, the user can adjust the readout resolution from 9 to 12 bits. this is particularly useful in a pplications where thermal runaway conditions must be detected quickly. the open?drain thermal alarm output, o.s., becomes activ e when the temperature of the device exceeds a user?defined temperature t os . the number of consecutive faults required to set o.s. active is configurable by the user. the device can also be configured in the interrupt or comparator mode, to customize the method which clears the fault condition. as a digital thermometer, the ds1775 is software compatible with the ds75 2?wire thermal watchdog. the ds1775 is assembled in a compact sot23?5 package allowing for low?cost thermal monitoring/control in space?constrai ned applications. the low therma l mass allows for time constants previously only possible with thermistors. applications for the ds1775 include personal computers/servers/workst ations, cellular telephones, office equipment, or any thermally?sensitive system. ds1775 sot23-5 digital thermomete r and thermostat product preview www.maxim-ic.com ds1775r sot23-5 3 2 1 5 4 sda v dd scl gnd o.s.
ds1775 2 of 14 ordering information part addr marking description ds1775r+t&r 000 7750 (see note) ds1775r in lead-free 5-pin sot-23, 3000 piece tape- and-reel ds1775r+u 000 7750 (see not e) ds1775r in lead-free 5-pin sot-23 ds1775r/t&r 000 7750 ds1775r in 5-pin sot-23, 3000 piece tape-and-reel ds1775r-u 000 7750 ds1775r in lead-free 5-pin sot-23 ds1775r1+t&r 001 7751 (see note) ds1775r1 in lead-free 5-pin sot-23, 3000 piece tape-and-reel ds1775r1+u 001 7751 (see not e) ds1775r1 in lead-free 5-pin sot-23 ds1775r1/t&r 001 7751 ds1775r1 in 5-pin sot-23, 3000 piece tape-and-reel ds1775r1-u 001 7751 ds1775r1 in lead-free 5-pin sot-23 ds1775r2+t&r 010 7752 (see note) ds1775r2 in lead-free 5-pin sot-23, 3000 piece tape-and-reel ds1775r2+u 010 7752 (see not e) ds1775r2 in lead-free 5-pin sot-23 ds1775r2/t&r 010 7752 ds1775r2 in 5-pin sot-23, 3000 piece tape-and-reel ds1775r2-u 010 7752 ds1775r2 in lead-free 5-pin sot-23 ds1775r3+t&r 011 7753 (see note) ds1775r3 in lead-free 5-pin sot-23, 3000 piece tape-and-reel ds1775r3+u 011 7753 (see not e) ds1775r3 in lead-free 5-pin sot-23 ds1775r3/t&r 011 7753 ds1775r3 in 5-pin sot-23, 3000 piece tape-and-reel ds1775r3-u 011 7753 ds1775r3 in lead-free 5-pin sot-23 ds1775r4+t&r 100 7754 (see note) ds1775r4 in lead-free 5-pin sot-23, 3000 piece tape-and-reel ds1775r4+u 100 7754 (see not e) ds1775r4 in lead-free 5-pin sot-23 ds1775r4/t&r 100 7754 ds1775r4 in 5-pin sot-23, 3000 piece tape-and- reel ds1775r4-u 100 7754 ds1775r4 in lead-free 5-pin sot-23 ds1775r5+t&r 101 7755 (see note) ds1775r5 in lead-free 5-pin sot-23, 3000 piece tape-and-reel ds1775r5+u 101 7755 (see not e) ds1775r5 in lead-free 5-pin sot-23 ds1775r5/t&r 101 7755 ds1775r5 in 5-pin sot-23, 3000 piece tape-and- reel ds1775r5-u 101 7755 ds1775r5 in lead-free 5-pin sot-23 ds1775r6+t&r 110 7756 (see note) ds1775r6 in lead-free 5-pin sot-23, 3000 piece tape-and-reel ds1775r6+u 110 7756 (see not e) ds1775r6 in lead-free 5-pin sot-23 ds1775r6/t&r 110 7756 ds1775r6 in 5-pin sot-23, 3000 piece tape-and- reel ds1775r6-u 110 7756 ds1775r6 in lead-free 5-pin sot-23 ds1775r7+t&r 111 7757 (see note) ds1775r7 in lead-free 5-pin sot-23, 3000 piece tape-and-reel ds1775r7+u 111 7757 (see not e) ds1775r7 in lead-free 5-pin sot-23 ds1775r7/t&r 111 7757 ds1775r7 in 5-pin sot-23, 3000 piece tape-and- reel ds1775r7-u 111 7757 ds1775r7 in lead-free 5-pin sot-23 note: a ?+? will also be marked on the package.
ds1775 3 of 14 detailed pin description table 1 pin symbol description pin 1 scl clock input/output pin for 2-wire serial comm unication port. this input should be tied to gnd for standa lone thermostat operation. pin 2 gnd ground pin . pin 3 o.s. thermostat output open-drain output becomes active when temperature exceeds t os . device configuration defines means to clear over-temperature state. pin 4 v dd supply voltage 2.7v ? 5.5v input power pin. pin 5 sda data input/output pin for 2-wire serial communica tion port. in the standalone thermostat mode, this input selects hysteresis. overview a block diagram of the ds1775 is shown in figure 1. the ds1775 consists of five major components: 1. precision temperature sensor 2. analog?to?digital converter 3. 2?wire interface electronics 4. data registers 5. thermostat comparator the factory?calibrated temperature sensor requi res no external components. upon power?up, the ds1775 begins temperature conversions with the default resolution of 9 bits (0.5 c resolution). the host can periodically read the value in the temperature register, which contains the last completed conversion. as conversions are performed in the background, readin g the temperature register does not affect the conversion in progress. in power?sensitive applications the user can put the ds1775 into a shutdown mode, under which the sensor will complete and store the conversion in progress and revert to a low?power standby state. in applications where small incrementa l temperature changes are critical, th e user can change the conversion resolution from 9 bits to 10, 11, or 12. each additi onal bit of resolution a pproximately doubles the conversion time. this is accomplis hed by programming the configurat ion register. the configuration register defines the conversion state, thermome ter resolution/conversion time, active state of the thermostat output, number of consecutive faults to trigger an alarm condition, and the method to terminate an alarm condition. the user can also program over?temperature (t os ) and under?temperature (t hyst ) setpoints for thermostatic operation. the power?up state of t os is 80 c and that for t hyst is 75 c. the result of each temperature conversion is compared with the t os and t hyst setpoints. the ds1775 offers two modes for temperature control, the comparator mode and the interrupt mode. this allows the user the flexibility to customize the condition that would generate and clear a fault condition. regardless of the mode chosen, the o.s. output will become active only after the meas ured temperature exceeds the respective trippoint a consecutive number of times; the number of consecutive conversions beyond the limit to generate an o.s. is programmable. the power?up state of the ds1775 is in the comparator mode with a single fault generating an active o.s. digital data is written to/read from the ds1775 via a 2?wire interface, and all communication is msb first.
ds1775 4 of 14 ds1775 functional block diagram figure 1 operation?measuring temperature the core of ds1775 functionality is its direct?t o?digital temperature sensor. the ds1775 measures temperature through the use of an on?chip temperatur e measurement technique with an operating range from ?55 c to +125 c. temperature conversions are initiate d upon power?up, and the most recent result is stored in the thermometer register. conversions ar e performed continuously unless the user intervenes by altering the configuration register to put th e ds1775 into a shutdown mode. regardless of the mode used, the digital temperature can be retrieved from the temperature register by setting the pointer to that location (00h, power?up default). the ds1775 power?up default has the sensor automatically performing 9?bit conversions continuously. details on how to cha nge the settings after power?up are contained in the ?operation?programming? section. the resolution of the temperature c onversion is configurable (9, 10, 11, or 12 bits), with 9?bit readings the default state. this equates to a temperature resolution of 0.5 c, 0.25 c, 0.125 c, or 0.0625 c. following each conversion, thermal data is stored in the thermometer regist er in two?s complement format; the information can be retrieved over the 2?wire interface with the device pointer set to the temperature register. table 2 describes the exact relati onship of output data to measured temperature. the table assumes the ds1775 is configured for 12?bit re solution; if the device is configured in a lower resolution mode, those bits will contain zeros. the data is transmitted serially over the 2?wire serial interface, msb first. the msb of the temperature regist er contains the ?sign? (s) bit, denoting whether the temperature is positive or negative. for fahrenheit us age, a lookup table or conversion routine must be used.
ds1775 5 of 14 temperature/data relationships table 2 s 2 6 2 5 2 4 2 3 2 2 2 1 2 0 msb msb (unit = c) lsb 2 -1 2 -2 2 -3 2 -4 0 0 0 0 lsb temp digital output (binary) digital output (hex) +125 c 0111 1101 0000 0000 7d00h +25.0625 c 0000 1010 0010 0000 1910h +10.125 c 0000 1010 0010 0000 0a20h +0.5 c 0000 0000 1000 0000 0080h +0 c 0000 0000 0000 0000 0000h -0.5 c 1111 1111 1000 0000 ff80h -10.125 c 1111 0101 1110 0000 f5e0h -25.0625 c 1110 0110 1111 0000 e6f0h -55 c 1100 1001 0000 0000 c900h operation?thermostat control in its comparator operating mode, the ds1775 functions as a thermostat with programmable hysteresis, as shown in figure 2. when the ds1775?s temperature meets or exceeds the value stored in the high temperature trip register (t os ) a consecutive number of times, as defined by the configuration register, the output becomes active and stays active until the first time that the temperature falls below the temperature stored in the low temperature trigger register (t hyst ). in this way, any amount of hysteresis may be obtained. the ds1775 powers up in the comparator mode with t os =80 c and t hyst =75 c and can be used as a standalone thermostat (no 2?wire interface required) with those setpoints. in the interrupt mode, the o.s. output will first become active following the programmed number of consecutive conversions above t os . the fault can only be cleared by either setting the ds1775 in a shutdown mode or by reading any register (temperature, configuration, t os , or t hyst ) on the device. following a clear, a subsequent fault can only occur if consecutive conversions fall below t hyst . this interrupt/clear process is thus cyclical (t os , clear, t hyst , clear, t os , clear, t hyst , clear, ...). only the first of multiple consecutive t os violations will activate o.s., even if each fault is separated by a clearing function. the same situation a pplies to multiple consecutive t hyst events.
ds1775 6 of 14 o.s. output transfer function figure 2 regardless of the mode chosen, the o.s. output is open?drain and the active state is set in the configuration register. the power?up default is ac tive low. refer to the ?operation?programming? section for instructions in adjusting the thermostat setpoints, thermostat mode, and o.s. active state. operation?programming there are three areas of interest in programmin g the ds1775: the configuration register, the t os register, and the t hyst register. all programming is done via the 2?wire interface by setting the pointer to the appropriate location. table 3 illustrates the pointer settings for the four registers of the ds1775. pointer register structure table 3 pointer active register 00h temperature (default) 01h configuration 02h t hyst 03h t os the ds1775 will power up with the temperature register se lected. if the host wishes to change the data pointer it simply addresses the ds1775 in the write mode (r/ w =0), receives an acknowledge, and writes the 8 bits that correspond to the new desired location. the last pointer location is always maintained so that consecutive reads from the same register do not re quire the host to always provide a pointer address. the only exception is at power?up, in which case the poi nter will always be set to 00h, the temperature
ds1775 7 of 14 register. the pointer address must always proceed da ta in writing to a register, regardless of which address is currently selected. please refer to the ?2?wire serial data bus? section for details of the 2? wire bus protocol. configuration register programming the configuration register is accessed if the ds17 75 pointer is currently set to the 01h location. writing to or reading from the register is determined by the r/w bit of the 2?wire control byte (see ?2?wire serial data bus? section). data is read from or written to the configuration register msb first. the format of the register is illustrated below in figure 3. the effect each bit has on ds1775 functionality is described below along with the power?up state of the bit. the user has read/write access to all bits in the configuration register. the entire register is vola tile, and thus it will power?up in the default state. configuration/status register figure 3 0 r1 r0 f1 f0 pol tm sd msb lsb sd = shutdown bit. if sd is ?0?, the ds1775 will c ontinuously perform temperature conversions and store the last completed result in th e thermometer register. if sd is changed to ?1?, the conversion in progress will be completed and stored; then the de vice will revert to a low?power standby mode. the o.s. output will be cleared if the device is in the interrupt mode and remain unchanged in the comparator mode. the 2?wire port remains active. the power?up de fault state is ?0? (con tinuous conversion mode). tm = thermostat mode. if tm=?0?, the ds1775 is in th e comparator mode. tm=?1? sets the device to the interrupt mode. see ?operation?thermostat contro l? section for a description of the difference between the two modes. the power?up default stat e of the tm bit is ?0? (comparator mode). pol = o.s. polarity bit. if pol = ?1?, the active state of the o.s. output will be high. a ?0? stored in this location sets the thermostat output to an active low state. the user has read/write access to the pol bit, and the power?up default state is ?0? (active low). f0, f1 = o.s. fault tolerance bits. the fault toleranc e defines the number of consecutive conversions returning a temperature beyond limits is required to set the o.s. output in an active state. this may be necessary to add margin in noisy environments. ta ble 4 below defines the four settings. the ds1775 will power up with f0=f1=?0?, such that a single occurrence will trigger a fault. fault tolerance configuration table 4 f1 f0 consecutive conversions beyond limits to generate fault 0 0 1 0 1 2 1 0 4 1 1 6 r0, r1 = thermometer resolution bits. table 5 defines the resolution of the digital thermometer, based on the settings of these two bits. there is a direct trade-off between resoluti on and conversion time, as depicted in the ac electri cal characteristics. the default state is r0="0" and r1="0" (9?bit conversions).
ds1775 8 of 14 thermometer resolution configuration table 5 r1 r0 thermometer resolution max conversion time 0 0 9-bit 0.1875s 0 1 10-bit 0.375s 1 0 11-bit 0.75s 1 1 12-bit 1.5s thermostat setpoints programming the thermostat registers (t os and t hyst ) can be programmed or read via the 2?wire interface. t os is accessed by setting the ds1775 data pointer to the 03h location, and to the 02h location for t hyst . the format of the t os and t hyst registers is identical to that of the thermometer register; that is, 12?bit 2?s complement representation of the temperature in c. the user can program the number of bits (9, 10, 11, or 12) for each t os and t hyst that corresponds to the thermometer resolution mode chosen. for example, if the 9?bit mode is chosen the 3 least significant bits of t os and t hyst will be ignored by the thermostat comparator. the format for both t os and t hyst is shown in table 6. the power?up default for t os is 80 c and for t hyst is 75 c. thermostat setpoint (t os /t hyst ) format table 6 s 2 6 2 5 2 4 2 3 2 2 2 1 2 0 msb msb (unit = c) lsb 2 -1 2 -2 2 -3 2 -4 0 0 0 0 lsb temperature/data relationships temp digital output (binary) digital output (hex) +80 c 0101 0000 0000 0000 5000h +75 c 0100 1011 0000 0000 4b00h +10.125 c 0000 1010 0010 0000 0a20h +0.5 c 0000 0000 1000 0000 0080h +0 c 0000 0000 0000 0000 0000h -0.5 c 1111 1111 1000 0000 ff80h -10.125 c 1111 0101 1110 0000 f5e0h -25.0625 c 1110 0110 1111 0000 e6f0h -55 c 1100 1001 0000 0000 c900h if the user does not wish to take advantage of th e thermostat capabilities of the ds1775, the 24 bits can be used for general storage of system data that need not be maintained following a power loss.
ds1775 9 of 14 2?wire serial data bus the ds1775 supports a bi?directional 2-wi re bus and data transmission prot ocol. a device that sends data onto the bus is defined as a transmitter, and a device receiving data as a receiver. the device that controls the message is called a ?master?. the devices that are controlled by the master are ?slaves?. the bus must be controlled by a master device which generates the serial clock (s cl), controls the bus access, and generates the start and stop conditions. the ds1775 operates as a slave on the two?wire bus. connections to the bus are made via th e open?drain i/o lines sda and scl. the following bus protocol has been defined (see figure 4): data transfer may be initiated only when the bus is not busy. during data transfer, the data line must remain stable whenever the clock line is high. changes in the data line while the clock line is high will be interpreted as control signals. accordingly, the following bus conditions have been defined: bus not busy: both data and clock lines remain high. start data transfer: a change in the state of the data line, from high to low, while the clock is high, defines a start condition. stop data transfer: a change in the state of the data line, from low to high, while the clock line is high, defines the stop condition. data valid: the state of the data line represents valid data when, after a start condition, the data line is stable for the duration of the high period of th e clock signal. the data on the line must be changed during the low period of the clock signal. th ere is one clock pulse per bit of data. each data transfer is initiated with a start c ondition and terminated with a stop condition. the number of data bytes transferred between start and stop conditions is not limited, and is determined by the master device. the information is transferred byte?wise and each receiver acknowledges with a ninth bit. within the bus specifications a regular mode (100khz clock rate) and a fast mode (400khz clock rate) are defined. the ds1775 works in both modes. acknowledge: each receiving device, when addressed, is obliged to generate an acknowledge after the reception of each byte. the master device must generate an extra clock pulse which is associated with this acknowledge bit. a device that acknowledges must pull down the sda line during the acknowledge clock pulse in such a way that the sda line is stable low during the high period of the acknowledge related clock pulse. of course, setup and hold times must be taken into account. a master must signal an end of data to the slave by not generating an acknowledge bit on the last byte that has been clocked out of the slave. in this case, the slave must leave the data line high to enab le the master to generate the stop condition.
ds1775 10 of 14 data transfer on 2?wire serial bus figure 4 figure 5 details how data transfer is accomplished on the two?wire bus. depending upon the state of the r/w bit, two types of data transfer are possible: 1. data transfer from a master transmitter to a slave receiver. the first byte transmitted by the master is the slave address. next follows a numbe r of data bytes. the slave returns an acknowledge bit after each received byte. 2. data transfer from a slave transmitter to a master receiver. the first byte (the slave address) is transmitted by the master. the slave then returns an acknowledge bit. next follows a number of data bytes transmitted by the slave to the master. the master returns an acknowledge bit after all received bytes other than the last byte. at the end of the last received byte, a ?not acknowledge? is returned. the master device generates all of the serial clock pulses and the start and stop conditions. a transfer is ended with a stop condition or with a repeated star t condition. since a repeated start condition is also the beginning of the next serial transfer, the bus will not be released. the ds1775 may operate in the following two modes: 1. slave receiver mode: serial data and clock are received through sda and scl. after each byte is received, an acknowledge bit is transmitted. start and stop conditions are recognized as the beginning and end of a serial transfer. address re cognition is performed by hardware after reception of the slave address and direction bit. 2. slave transmitter mode: the first byte is received and handled as in the slave receiver mode. however, in this mode, the direction bit will indicate that the transfer direction is reversed. serial data is transmitted on sda by the ds1775 while the seri al clock is input on scl. start and stop conditions are recognized as the beginning and end of a serial transfer. slave address a control byte is the first byte received following the start condition from the master device. the control byte consists of a four bit control code; for the ds1775, this is set as 1001 binary for read and write operations. the next three bits of the control byte are the device select bits (a2, a1, a0). these bits are set to 000 (a2="0", a1="0", a0="0") for the ds1775r/trl and vary according to the device's part number as specified in the "ordering information" section. they are used by the master device to select which of eight devices are to be accessed. the set bits are in effect the three least significant bits of the slave address. the last bit of the control byte (r/ w ) defines the operation to be performed. when set to a "1" a read operation is selected, and when set to a "0" a write operation is selected. following the start condition, the ds1775 monitors the sda bus checking the device type identifie r being transmitted. upon receiving the 1001 code and appropr iate device select bits of 000, the ds1775 outputs an acknowledge signal on the sda line.
ds1775 11 of 14 2?wire serial communication with ds1775 figure 5
ds1775 12 of 14 absolute maximum ratings* voltage on vdd, relative to ground ?0.3v to +7.0v voltage on any other pin, relativ e to ground ?0.3v to +7.0v operating temperature ?55 c to +125 c storage temperature ?55 c to +125 c soldering temperature see j-std-020a specification * this is a stress rating only and f unctional operation of the device at these or any other conditions above those indicated in the operation sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods of time may affect reliability. dc electrical characteristics (?55 c to +125 c; 2.7v v dd 5.5v ) parameter symbol condition min typ max units notes supply voltage v dd 2.7 5.5 v 1 input logic high v ih 0.7 v dd v dd +0.5 v 1 input logic low v il -0.5 0.3v dd v 1 v ol1 3 ma sink current 0 0.4 sda output logic low voltage v ol2 6 ma sink current 0 0.6 v 1 o.s. saturation voltage v ol 4 ma sink current 0.8 v 1,9 input current each i/o pin 0.4 < v i/o < 0.9v dd -10 +10 a 2 i/o capacitance c i/o 10 pf standby current i dd1 1 a 3,4 active temp. conversions 1000 active current i dd communication only 100 a 3,4 electrical characteristics: digital thermometer (?55 c to +125 c; 2.7v v dd 5.5v) parameter symbol condition min typ max units notes thermometer error t err ?10 c to +85 c ?55 c to 125 c 2.0 3.0 c 9, 10 resolution 9 12 bits 9-bit conversion 125 187.5 10-bit conversion 250 375 11-bit conversion 500 750 conversion time t convt 12-bit conversion 1000 1500 ms
ds1775 13 of 14 ac electrical characteristics: 2?wire interface (?55 c to +125 c; v dd =2.7v to 5.5v) parameter symbol condition min typ max units notes scl clock frequency f scl fast mode standard mode 400 100 khz bus free time between a stop and start condition t buf fast mode standard mode 1.3 4.7 s hold time (repeated) start condition t hd:sta fast mode standard mode 0.6 4.0 s 5 low period of scl t low fast mode standard mode 1.3 4.7 s high period of scl t high fast mode standard mode 0.6 4.0 s set-up time for a repeated start t su:sta fast mode standard mode 0.6 4.7 s data hold time t hd:dat fast mode standard mode 0 0 0.9 0.9 s 6 data set-up time t su:dat fast mode standard mode 100 250 ns 7 rise time of both sda and scl signals t r fast mode standard mode 20+ 0.1c b 300 1000 ns 8 fall time of both sda and scl signals t f fast mode standard mode 20+ 0.1c b 300 300 ns 8 set-up time for stop t su:sto fast mode standard mode 0.6 4.0 s capacitive load for each bus line c b 400 pf 8 input capacitance c i 5 pf notes: 1. all voltages are referenced to ground. 2. i/o pins of fast mode devices must not obstruct the sda and scl lines if v dd is switched off. 3. i dd specified with o.s. pin open. 4. i dd specified with v dd at 5.0v and sda, scl = 5.0v, 0 c to +70 c. 5. after this period, the first clock pulse is generated. 6. the maximum t hd:dat has only to be met if the device does not stretch the low period (t low ) of the scl signal. 7. a fast mode device can be used in a st andard mode system, but the requirement t su:dat 250 ns must then be met. this will automatically be the case if the device does not stretch the low period of the scl signal. if such a device does stretch the low period of the scl signal, it must output the next data bit to the sda line t r max +t su:dat = 1000+250 = 1250 ns before the scl line is released. 8. c b ? total capacitance of one bus line in pf. 9. internal heating caused by o.s. loading will cau se the ds1775 to read approximately 0.5oc higher if o.s. is sinking the max rated current. 10. contact the factory in dallas, (972) 371-4448, for operation requiring temperature readings greater than 120c.
ds1775 14 of 14 timing diagrams figure 6

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